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The Rebirth of Persistent Memory and CXL DDR4 Reuse

5 min read

By Arthur Sainio, SNIA CMS PM SIG Chair, Penguin Solutions And Mario Martinez, Netlist (A Contributor member of the CXL Consortium); JEDEC Member Representative

 

For more than a decade, persistent memory promised to bridge the gap between DRAM and storage. By combining memory-speed access with storage-like persistence, it offered the potential to transform databases, analytics, and high-performance computing (HPC) workloads. However, early implementations were largely tied to proprietary processor architectures and platform-specific support.

Compute Express Link® (CXL®) is creating a new opportunity for persistent memory to return as a standards-based technology. CXL Type-3 devices enable memory expansion, pooling, and future persistent memory implementations through an open ecosystem supported by processors, memory suppliers, and system vendors. CXL 2.0 introduced memory pooling and architectural support for future persistent memory implementations, while CXL 3.0 extends these capabilities with fabric-attached memory architectures that allow memory resources to be shared across multiple hosts and accelerators.

Database and HPC Acceleration

Persistent memory remains highly attractive for database transaction processing. Modern databases continuously perform write-ahead logging (WAL) to protect data and enable rapid recovery. Traditional storage adds latency, while persistent memory enables critical logs and metadata to reside in byte-addressable non-volatile memory closer to the processor. This can reduce logging overhead, improve transaction latency, and accelerate recovery following outages.

Persistent memory also benefits HPC and AI environments. Large-scale simulations and AI training jobs periodically create checkpoints to protect against failures. Traditional checkpoints consume storage bandwidth and increase execution time. By storing checkpoints in a low-latency persistent memory tier, systems can reduce checkpoint overhead and resume workloads more quickly after interruptions, improving overall utilization.

Why CXL Adoption Is Accelerating

The growing interest in CXL-based memory expansion and DDR4 reuse is being reinforced by industry-wide memory supply constraints. SK hynix CEO Kwak Noh-jung recently stated that 2027 could be “the worst year in the industry’s history from a supply perspective,” and that customer demand may remain above industry supply capacity beyond 2030. SK hynix has also reported that customer requests for HBM supplies over the next three years already exceed production capacity.

The rapid growth of AI infrastructure has significantly increased demand for DRAM and HBM capacity. Industry analysts, including TrendForce and Omdia, have highlighted how AI server demand is consuming memory production capacity and creating structural supply pressures across conventional DRAM markets.

Growing CXL Adoption Creates the Foundation

The long-term opportunity for persistent memory is being reinforced by the rapid adoption of CXL-capable server platforms. Major processor vendors, including Intel and AMD, have incorporated CXL support into current and next-generation server architectures, while memory suppliers, infrastructure vendors, and cloud service providers continue to expand the CXL ecosystem. As organizations seek to improve memory utilization, increase memory capacity, and support increasingly demanding AI workloads, CXL is evolving from an emerging technology into a standard infrastructure capability.

Industry forecasts indicate that CXL adoption will continue to accelerate throughout the decade. According to Omdia, approximately 45% of servers shipped by 2030 are expected to include CXL support. At the same time, AI training and inference workloads are projected to account for more than half of server deployments, further increasing demand for memory capacity, memory efficiency, and resource sharing across the data center.

This expanding installed base creates an immediate opportunity for CXL memory expansion and DDR4 reuse solutions while simultaneously laying the groundwork for future generations of pooled and persistent memory architectures. What begins as memory expansion today can evolve into memory pooling and, ultimately, fabric-attached persistent memory as CXL 3.0 deployments mature.

As CXL adoption expands, the industry is moving beyond the traditional model of memory being permanently attached to a single server. Instead, memory is increasingly becoming a shared infrastructure resource that can be dynamically expanded, pooled, and eventually integrated into persistent memory fabrics spanning multiple servers and accelerators. This architectural shift is expected to play a critical role in addressing future AI, database, and HPC memory requirements.

Large cloud and enterprise operators continue to refresh server fleets, creating substantial pools of DDR4 RDIMMs that retain significant useful life. Rather than retiring these assets, CXL Type-3 devices provide a mechanism to repurpose existing memory into valuable capacity tiers for databases, analytics, AI inference, and storage acceleration workloads.

Two complementary trends are emerging:

Memory Reuse (2026–2028)

  • Repurposing retired DDR4 server memory
  • Lower acquisition costs
  • Improved sustainability and asset utilization
  • Attractive for organizations facing memory shortages

Memory Pooling (2027+)

  • New CXL 3.0 fabric-attached architectures
  • Purpose-built non-volatile memory technologies
  • Memory pooling and sharing across multiple hosts
  • Persistent memory tiers optimized for databases and HPC

While next-generation CXL 3.0 infrastructures are expected to gain momentum beginning in 2027, demand for DDR4 reuse solutions is likely to remain strong through at least 2028 as organizations seek to alleviate memory constraints while improving total cost of ownership and extending the value of existing assets.

The result is that both reuse and non-reuse memory models are helping accelerate CXL adoption, creating a broader ecosystem that supports memory expansion, pooling, persistence, and composable infrastructure.

From Memory Reuse to Memory Fabrics

The resurgence of persistent memory is occurring alongside a broader industry effort to maximize memory efficiency. CXL not only enables future persistent memory architecture but also provides a pathway for extending the useful life of existing DDR4 memory assets.

This creates a powerful story:

  1. Past: Optane and JEDEC persistent memory.
  2. Present: DRAM shortages and DDR4 reuse via CXL 2.0 Type-3 devices.
  3. Future: CXL 3.0 pooled persistent memory fabrics.

The convergence of persistent memory, memory pooling, and memory reuse is creating new opportunities for data center operators to improve performance, resilience, and memory efficiency. As CXL 3.0 adoption accelerates, organizations can leverage both existing DDR4 memory assets and next-generation persistent memory technologies to address near-term capacity challenges while preparing for the composable infrastructure architectures of the future.

Call to Action

Interested in learning more about CXL memory expansion, persistent memory, and composable infrastructure? Explore the latest specifications, technical papers, and ecosystem developments through the CXL Consortium, SNIA, Netlist, and SMART Modular websites.

 

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