The CXL Consortium is looking forward to returning to the Future of Memory and Storage (FMS) event at the Santa Clara Convention Center.
Kiosk at the Open Standards Pavilion (Booth no. 725)
Meet with CXL Consortium representatives to explore how CXL can expand your memory footprint. Contact press@computeexpresslink.org to schedule a meeting with CXL representatives.
CXL Panel on Wednesday, August 5, at 8:30 am PT
- Panel Title: Beyond the Memory Wall: How CXL Memory Pooling and Sharing Are Transforming AI Inference
- Session Abstract: CXL enables a cache-coherent memory architecture delivering the capacity, shareability, and low latency that AI inference demands at scale.
As inference workloads scale and context windows grow, the rigid, siloed memory architectures of traditional GPU servers are both costly and inefficient. CXL memory pooling and sharing features are reshaping how memory is provisioned, allocated, and consumed across the memory hierarchy.This panel brings together experts in memory architecture and AI infrastructure to examine how CXL memory pooling and sharing directly address AI inference deployment challenges. The discussion will focus on CXL’s advantages for AI inference, explore memory-tiering via KV Cache offloading, and highlight how the CXL ecosystem enables practical, disaggregated memory.
- Moderator: Anil Godbole, CXL MWG Chair (Intel)
- Panelists: Sandeep Dattaprasad (Astera Labs), Sumit Puri (Liqid), Luis Ancajas (Micron), Ronen Hyatt (UnifabriX)
We hope to see you there!