CXL Consortium Recap: Scaling AI Infrastructure at AI Infra Summit 2026

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AI Infra Summit 2026 brought together data center architects, system designers, and infrastructure leaders in Santa Clara, CA, from September 15 – 17. At the event, the CXL Consortium demonstrated how the latest developments in CXL technology help the industry break through the memory wall facing AI workloads.


At the CXL Pavilion, Consortium member companies Liqid, Primemas and VIAVI showcased live demonstrations spanning memory expansion, memory pooling, composable infrastructure, and CXL 3.2 interoperability. Consortium representatives and member experts also took the stage for a Demo Theater session and a panel discussion on the evolving relationship between AI model architecture and hardware.



Missed the show or want a closer look? Read on for session highlights, video interviews with our demo partners, and CXL news from the event.


Demo Theater Session: Boost Your AI Performance With CXL


On Wednesday, September 16, CXL Consortium Board Director Siamak Tavallaei of Samsung moderated a Demo Theater panel, exploring how CXL is transforming AI infrastructure design. Panelists Sandeep Dattaprasad of Astera Labs, Hasan Al Maruf of Meta, and Joe Baco of Primemas explored how CXL memory devices support large language models and retrieval-augmented generation (RAG) pipelines, improve accelerator efficiency, and enable larger model contexts.



The panel also addressed infrastructure bottlenecks in hyperscale and enterprise deployments. Panelists shared real-world deployment considerations, the performance improvements CXL can deliver, and how CXL enables scalable memory expansion, memory pooling, and more efficient resource utilization across CPUs, GPUs, and accelerators.



Panel Session: Scaling the AI Memory Wall – Where Model Architecture Meets Hardware

Later that afternoon, CXL Consortium Board Chair Dr. Debendra Das Sharma of Intel led a panel with Nuwan Jayasena of AMD, Karthik Ganesan of Micron and Andy Mills of Penguin Solutions. The group explored how memory technology roadmaps must keep pace with growing model sizes, longer context windows, and the shift toward inference and agentic AI.


Video Interviews: CXL Pavilion

We connected with member companies demonstrating CXL solutions across the show floor. Watch the interviews below to see how the CXL ecosystem is putting memory expansion, pooling, and sharing to work for AI infrastructure.


Liqid

Liqid demonstrated its software-defined memory and GPU pooling infrastructure. The disaggregated memory pooling solution offers up to 160 TB of DDR5 as an addressable pool that Liqid Matrix software can dynamically allocate across servers.

Primemas

Primemas showcased its PMA16 CXL Type 3 add-in card in a JBOM (Just a Bunch of Memory) expansion system for rack-scale AI memory. The PMA16 delivers up to 4 TB of memory with 256 GB RDIMMs or 8 TB with 512 GB RDIMMs.

VIAVI

VIAVI demonstrated a live CXL 3.2 link between the VIAVI CXL RC Exerciser and a Montage Technology CXL retimer, highlighting the test and validation tools that help the ecosystem bring interoperable CXL 3.x solutions to market.

Video Interviews: CXL Consortium Members at the Show

Astera Labs

Penguin Solutions

UnifabriX

CXL News Highlights

CXL Consortium members also shared announcements around the event. Read their announcements below to learn more about their CXL solutions.

  • Astera Labs expands Leo Smart Memory Controller family (Sept. 15): Astera Labs introduced the Leo X-Series fabric-attached memory controller for agentic AI and the Leo 2 E-Series and P-Series for CPU-attached expansion and disaggregated memory pooling. All new products support CXL 3.2 and are sampling with hyperscaler customers. Read the announcement
  • Penguin Solutions showcases CXL-based memory for inference (Sept. 2): Penguin Solutions previewed its MemoryAI KV cache server with CXL-based memory, SMART Modular CXL add-in cards and the Liqid EX-5410C CXL memory expansion chassis. Read the announcement

AI Infra Summit 2026 showed that memory is central to scaling AI infrastructure, and the CXL ecosystem is ready to help. From memory expansion and pooling to fabric-attached memory and CXL 3.2 validation, our members demonstrated how CXL helps architects increase capacity, improve utilization, and lower total cost of ownership for AI workloads.

Thank you to our member companies, panelists, and everyone who stopped by booth.

Up Next for the CXL Consortium: Supercomputing 2026 (SC26)

Next up, the CXL Consortium is hosting the CXL Pavilion at SC26! Visit booth no. 1218 to view the following CXL technology demonstrations:

  • AMD | Powering Next-Generation Agentic AI with AMD Epyc and CXL Gen6 Expanded Memory
  • Astera Labs | From Bottleneck to Breakthrough: Accelerating AI Inferencing for Agentic AI with Leo Smart Memory Controllers
  • Intel | Optimize Memory TCO with Intel® Flat Memory Mode for Agentic AI on Future-Gen Xeon Processor
  • Lightelligence | CXL 3.X Over Optics
  • Micron | Abaco Reference Design: Redefining DRAM as Shared Infrastructure for Scalable Agentic AI
  • Montage Technology | CXL Dynamic Capacity Device (DCD) Technology
  • Netlist | Unlocking the Full Potential of CXL Memory Solutions for AI, Cloud, and Enterprise
  • Panmnesia | CXL 3.2 Fabric Switch Supporting Port-Based Routing
  • Penguin Solutions | DDR4 Reimagined: Expanding DDR5 Server Memory with CXL
  • Primemas | Expand Memory Beyond Limits
  • ScaleFlux | MC600 CXL Memory Expansion
  • UnifabriX | POOL IT. SHARE IT. ACCELERATE AI. Powered by UnifabriX MPU
  • VIAVI | CXL 3.X Link-Up Through Unretimed LPO

We hope to see you in Chicago!

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