Thomas Won Ha Choi is a Distinguished Engineer and Memory Systems Architect at SK hynix, specializing in memory standardization and pathfinding of next-generation memory products. Thomas is involved in various memory standardization projects in CXL Consortium and JEDEC, and he is experienced with standardization of next-generation memory interconnect such as CXL, CCIX, Gen-Z and JEDEC NVDIMM-P, and next-generation DRAM specifications such as JEDEC DDR5 and DDR6. Furthermore, Thomas was one of the key members in planning of CXL Memory Module development within SK hynix, preparing initial memory requirement drafts by leading the collaboration efforts with customers and partners around the CXL ecosystem. Previously from 2016 to 2022, Thomas also served as a Director on the Gen-Z Consortium Board of Directors.
Thomas has a B.S. degree in Computer Sciences from the University of Texas at Austin, a M.S. degree in Computer Engineering from the University of Southern California, and a Ph.D. degree in Computer Engineering from North Carolina State University.