Amphenol – Expanding CXL Connectivity with Amphenol 32.0+ Gbps Optical QSFP-DD
Amphenol demonstrates 32+ Gbps over optical QSFP-DD (x8 lanes) to provide several key advantages over traditional copper cables, in partnership with fellow CXL members GigaIO and Microchip. Optical x16 links will allow compute nodes to be distributed across multiple racks in the data center, greatly increasing compute bandwidth.
Liqid – Composable CXL memory Preview: Rapid Deployment and Migration with Liqid Matrix
This demo showcases the rapid installation and migration of CXL memory using the Liqid Matrix. The demo features the Liqid Matrix Composable Fabric, 1TB of Samsung CXL Memory, and two Intel Sapphire Rapids Servers. Learn more about the Liqid Matrix by visiting: www.liqid.com.
Rambus – CXL 2.0 Over Optics Subsystem Demonstration
In the video, Rambus demonstrates a CXL 2.0 over optics subsystem. The demo features a Rambus CXL endpoint device (featuring a Rambus CXL Controller) connected to a Viavi Xgig 6P4 Exerciser using Samtec Firefly optical cables. This subsystem runs at 16 GT/s on 4 lanes, showing stable performance in CXL mode at Gen 4 speeds. The demo further highlights a successful compliance test result of the subsystem over a 10-meter fiber optic connection. Optical interconnect solutions are essential to address the low latency and high bandwidth needs of disaggregated composable infrastructure, and this subsystem successfully demonstrates these capabilities.
Learn more by visiting www.rambus.com.
SMART Modular Technologies – The Advantages and Use Cases of Memory and Bandwidth Expansion Add in Cards with CXL®
This video provides an overview of SMART’s memory products with CXL®, highlighting applications, use cases, performance results, and benefits of using memory and bandwidth expansion Add-in Cards with CXL. The video will also share the following CXL features and use cases:
• Cost effective memory expansion for large database applications
• Cost effective memory bandwidth expansion for large database applications
• Latency and bandwidth test results from the MLC tool
Learn more about our CXL solutions by visiting www.smartm.com.
Synopsys – CXL 2.0 IP Interoperability Demo with Compliance Tests
In this video, you will see Synopsys’ CXL 2.0 IP showcasing compliance tests and interoperability with Teledyne LeCroy’s Z516 Exerciser. This demo highlights Synopsys’ commitment standards compliance and robust IP solutions.
Interoperability is key for standards-based systems. Showcasing solutions compliant to the CXL standard provide a low risk path to ecosystem interoperability. Learn more by visiting www.synopsys.com/designware-ip/interface-ip/cxl.html.
VIAVI – CXL 2.0 link on the VIAVI Xgig Platform
Yamini Shastry from VIAVI presents the Xgig chassis in Exerciser mode in a live CXL 2.0 link with a Cadence PCIe6 test chip DUT. Learn more by visiting www.viavisolutions.com.
ZeroPoint Technologies – Dynamically Adjusting, Hardware Compressed CXL Memory Tier
Our demo showcases a Dynamically Adjusting Composable Memory Tiered system featuring a hardware-accelerated, compressed memory tier seamlessly integrated into a CXL Type 3 device. Powered by DenseMem IP, this revolutionary solution delivers up to 2-4X data compression, eliminating the need for CPU-intensive software compression and saving up to 5% of precious CPU cycles, power, and die area.
Watch as real-world workloads effortlessly execute on this system, benefiting from transparent compression and decompression via the .mem interface. Our technology is compatible with the OCP Hyperscale CXL Tiered Memory Expander Specification, making it easy to adopt for any CXL SoC or ASIC. By dramatically reducing TCO and unlocking the full potential of CXL, we’re empowering hyperscale and enterprise customers to build more efficient and cost-effective data centers.