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Press Releases
CXL Consortium Announces Compute Express Link 3.2 Specification Release
Dec 3, 2024
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CXL Consortium announces Compute Express Link 3.1 specification release
Nov 14, 2023
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CXL® Consortium Members – Statements of Support for CXL 3.1 Specification
Nov 14, 2023
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CXL Consortium and JEDEC Sign MOU Agreement to Advance DRAM and Persistent Memory Technology
Aug 24, 2022
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CXL Consortium releases Compute Express Link 3.0 specification to expand fabric capabilities and man...
Aug 2, 2022
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CXL® Consortium Members – Statements of Support for CXL 3.0 Specification
Aug 2, 2022
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CXL Consortium and OpenCAPI Consortium Sign Letter of Intent to Transfer OpenCAPI Specifications to ...
Aug 1, 2022
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CXL Consortium Signs Agreement with Gen-Z Consortium to Accept Transfer of Gen-Z Specifications and ...
Feb 10, 2022
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CXL Consortium Showcases First Public Demonstrations of Compute Express Link Technology at Supercomp...
Nov 15, 2021
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CXL® Consortium Releases Compute Express Link® 2.0 Specification
Nov 10, 2021
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CXL® Consortium Members Statements of Support for CXL 2.0
Nov 10, 2020
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CXL® Consortium and Gen-Z Consortium Announce MOU Agreement
Apr 2, 2020
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Compute Express Link® Consortium (CXL®) Officially Incorporates; Announces Expanded Board of Directo...
Sep 17, 2019
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Key Industry Player Converge to Advance CXL®, a New High-Speed CPU Interconnect for Breakthrough Da...
Mar 11, 2019
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CXL® Promoter Statements of Support
Mar 11, 2019
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CXL™ in the News
Crucial tech that's pivotal for AI in hyperscalers gets major update to improve performance, enhance...
Dec 16, 2024
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CXL gains Big Mo as memory chokes on AI workloads
Dec 13, 2024
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CXL for Memory and More
Oct 18, 2024
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CXL Thriving As Memory Link
Sep 16, 2024
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CXL memory: The key to unlocking high-performance computing in modern data centers
Aug 29, 2024
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CXL moves forward as memory technology for AI
Aug 19, 2024
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CXL Gathers Momentum at FMS 2024
Aug 19, 2024
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CXL Brings Even More Memory to the Cloud
Aug 13, 2024
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MEMCON 2024: Insights into CXL, HBM, GenAI, and More
Mar 6, 2024
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What is “Stranded Memory?”
Mar 5, 2024
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CXL 3.1 Specification Aims for Big Topologies
Dec 1, 2023
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SC23: TOP500 Trends, the AI-HPC Crossover, Chiplet Standardization, the Emergence of UCIe and CXL Ad...
Nov 29, 2023
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Latest CXL Spec Lined up to Support DDR6
Nov 14, 2023
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CXL Gets Off the Drawing Board
Oct 17, 2023
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CXL: The Future Of Memory Interconnect?
Oct 12, 2023
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CXL in the datacentre: Boosting memory for hungry workloads
Sep 7, 2023
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Realizing the Potential of CXL with Jim Pappas and Kurtis Bowman
Aug 25, 2023
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Unveiling the Future of Memory and Storage: Insights FMS2023
Aug 10, 2023
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How CXL 3.0 technology will affect enterprise storage
May 16, 2023
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How DPUs, IPUs, and CXL Can Improve Data Center Power Efficiency
Apr 9, 2023
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A Game-Changing Approach, New Mergers and a Disruptive Technology with Siamak Tavallaei from the CXL...
Mar 23, 2023
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The History and Future of CXL with Jim Pappas | Utilizing Tech 4×20
Mar 20, 2023
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DesignCon 2023 A Hotbed for Technology Discussion
Feb 22, 2023
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Memory At The 2023 Designcon
Feb 16, 2023
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How the CXL Consortium is Driving Adoption with Siamak Tavallaei | Utilizing Tech 4×14
Feb 6, 2023
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SNIA Spec Gets Data Moving in CXL Environment - EE Times
Jan 4, 2023
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HPCwire Reveals Winners of the 2022 Readers’ and Editors’ Choice Awards During SC22 – HPCwire
Nov 14, 2022
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CXL Consortium Set to Present and Showcase Technology Demonstrations at SC’22 in Dallas, TX – HPCwir...
Nov 10, 2022
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A primer on CXL technology uses – SearchStorage
Oct 31, 2022
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CXL Spec Grows, Absorbs Others to Collate Ecosystem – EE Times
Sep 23, 2022
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CXL Ecosystem Enabling Memory Fabrics – Forbes
Sep 21, 2022
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What’s the Difference Between CXL 1.1 and CXL 2.0? – ElectronicDesign
Aug 24, 2022
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Flash memory vendors unveil PCIe 5.0 SSDs, latest spec for CXL interconnect tech – The Register
Aug 5, 2022
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Why you should start paying attention to CXL now – The Register
Aug 4, 2022
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Compute Express Link CXL 3.0 is the Exciting Building Block for Disaggregation – ServeTheHome
Aug 4, 2022
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Compute Express Link (CXL) 3.0 Announced: Doubled Speeds and Flexible Fabrics – Anandtech
Aug 2, 2022
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CXL Brings Datacenter-sized Computing with 3.0 Standard, Thinks Ahead to 4.0 – HPCwire
Aug 2, 2022
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OpenCAPI to Be Folded into CXL – HPCwire
Aug 1, 2022
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Four key need-to-knows about CXL - ComputerWeekly
Jul 21, 2022
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How CXL may change the datacenter as we know it - The Register
May 16, 2022
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One Memory to Rule Them All: The Rise of CXL - Embedded Computing Design
May 12, 2022
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Choosing The Right Server Interface Architectures For High Performance Computing - Semiconductor Eng...
Apr 12, 2022
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Virtual Roundtable On Storage And Memory - Forbes
Jan 19, 2022
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Top 5 Data Center Tech to Watch in 2022 - SDxCentral
Jan 5, 2022
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Data centre disaggregation with Gen-Z and CXL - Gazettabyte
Dec 24, 2021
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CXL Put Through Its Paces - EE Times
Dec 10, 2021
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CXL Will Absorb Gen-Z - EE Times
Dec 9, 2021
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Intel Sapphire Rapids CXL with Emmitsburg PCH Shown at SC21 – Serve the Home
Dec 7, 2021
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Top 10 Showcases at Supercomputing 2021 – Serve the Home
Nov 28, 2021
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Finally, A Coherent Interconnect Strategy: CXL Absorbs Gen-Z – The Next Platform
Nov 23, 2021
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CXL Consortium Showcases First Public Demonstrations of Compute Express Link Technology at SC21 – HP...
Nov 15, 2021
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CXL Consortium at SC21: 1st Public Demo of Compute Express Link – insideHPC
Nov 15, 2021
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And so it comes to pass: Gen-Z will be folded into CXL – Blocks & Files
Nov 11, 2021
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Big Memory Needs Software-defined Memory – DCIG
Nov 11, 2021
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Planning for Servers in 2022 and Beyond Series – Serve the Home
Aug 6, 2021
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How the CXL interconnect will affect enterprise storage – Tech Target
Aug 5, 2021
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Compute Express Link or CXL What it is and Examples – Serve the Home
May 21, 2021
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CXL: Coherency, Memory, and I/O Semantics on PCIe Infrastructure – Electronic Design
May 11, 2021
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Safeguarding Data Over PCIe & CXL in Data Centers – Semiconductor Engineering
Apr 1, 2021
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Domain-Specific Memory – Semiconductor Engineering
Mar 11, 2021
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CXL gathers speed with 2.0 spec – EE Times
Jan 25, 2021
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Compute eXpress Link 2.0 (CXL 2.0) Finalized: Switching, PMEM, Security – AnandTech
Nov 10, 2020
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Compute Express Link CXL 2.0 Specification Released the Big One – ServeTheHome
Nov 10, 2020
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New CXL interconnect promises to move data faster, more efficiently at 32 GT/s – VentureBeat
Aug 20, 2020
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CXL Protocol Adds Capabilities over PCIe – EETimes
May 18, 2020
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CXL and Gen-Z Lay Borders with a Formal MOU We Talk Impact – ServeTheHome
Apr 8, 2020
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Memory-Centric Architectures With Gen-Z And CXL Alliance – Forbes
Apr 5, 2020
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CXL and Gen-Z Iron Out A Coherent Interconnect Strategy – The Next Platform
Apr 3, 2020
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CXL Enables Heterogenous Computing – Forbes
Sep 27, 2019
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CXL Consortium Formally Incorporated, Gets New Board Members & CXL 1.1 Specification – AnandTech
Sep 20, 2019
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ARM Joins CXL Consortium – HPCWire
Sep 11, 2019
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AMD Joins CXL Consortium: Playing in All The Interconnects – AnandTech
Jul 19, 2019
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Compute Express Link (CXL): From Nine Members to Thirty Three – AnandTech
Apr 15, 2019
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How are faster networks advancing the next generation of data centres? – Cloud Computing
Mar 19, 2019
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CXL Consortium Launches CPU-to-Anything High Speed Interconnect Protocol – HPCWire
Mar 14, 2019
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Tech Giants To Team Up For Boosting CXL Consortium Data Centre Performance – Analytics Insight
Mar 14, 2019
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Intel, Google and others join forces for CXL interconnect – Data Center Dynamics
Mar 13, 2019
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Industry Heavyweights Get Behind Data Centre Optimisation Effort For Artificial Intelligence – Data ...
Mar 12, 2019
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