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Breaking Memory Barriers: CXL's Game-Changing Impact on AI/ML
Dec 19, 2024
Presentations
ABI Research - Opportunities and Challenges for Compute Express Link (CXL)
Nov 6, 2024
White Papers
Making Memories at HyperScale with CXL®
Oct 10, 2024
Presentations
Exploring CXL® Use Cases and Implementations
Jun 27, 2024
Presentations
An Overview of RAS for Compute Express Link® Covering from CXL® 2.0 to CXL® 3.1
Mar 27, 2024
White Papers
Introducing the CXL 3.1 Specification
Feb 20, 2024
Presentations
Lightelligence: Photowave: Optical CXL Interconnect for Composable Data Center Architectures
Nov 30, 2023
Demos
Xconn Technologies: CXL 2.0 Memory Pooling (Sharing) Using Xconn Switch
Nov 30, 2023
Demos
Intel: CXL Memory Modes on Future Generation Intel Xeon CPUs
Nov 30, 2023
Demos
UniFabrix: MAXimize HPC and AI Speed with: MAX® memory and Storage Machine
Nov 22, 2023
Demos
ZeroPoint Technologies: Hardware Accelerated CXL Memory Compression
Nov 21, 2023
Demos
Samsung: Graph DB Application on CXL Memory Enabled System
Nov 21, 2023
Demos
Rambus: CXL Tiered Memory Platform Development Kit for Performant Memory Scaling
Nov 21, 2023
Demos
Micron: Micron CZ120 Memory Capacity Expansion for AI & HPC Workloads Using CXL
Nov 21, 2023
Demos
Microchip: HP Memory Capacity & Bandwidth Expansion
Nov 21, 2023
Demos
IntelliProp: Composable and Managed CXL Fabric Demo
Nov 21, 2023
Demos
Cadence: Silicon-Proven Subsystem IP for CXL Host and Endpoint from Cadence Live Demo with Viavi Pro...
Nov 21, 2023
Demos
Astera Labs: Demonstrating Breakthrough Memory Bandwidth and Performance for HPC and AI with Leo Mem...
Nov 21, 2023
Demos
AMD: Enhancing AI with CXL Memory Tiering
Nov 21, 2023
Demos
Viavi: CXL 2.0 Exerciser and Analyzer System
Nov 20, 2023
Demos
Synopsys / Teledyne LeCroy: CXL 2.0 Interop and Compliance Testing with Teledyne LeCroy Summit Z516 ...
Nov 20, 2023
Demos
Siemens EDA: CXL Performance Optimization & Validation SW Development Kit
Nov 20, 2023
Demos
Introducing Compute Express Link® (CXL®) 3.1: Significant Improvements in Fabric Connectivity, Memor...
Nov 1, 2023
White Papers
CXL Consortium Compliance Program Overview: Integrators List & Feature Testing
Sep 1, 2023
Presentations
XConn's CXL 2.0 Switch: Memory Pooling and Memory Sharing
Aug 10, 2023
Videos
Experience Reality, Not Blueprints: Panmnesia’s Real-World, Multi-Terabyte CXL Memory Disaggregation...
Aug 7, 2023
Videos
Elastics.cloud Rack-Scale Memory Pooling with CXL over Ethernet
Aug 7, 2023
Videos
Industry’s First CXL 2.0 RAS Capabilities Demo with Leo Memory Connectivity Platform
Aug 7, 2023
Videos
Micron CZ120 memory expansion module for Data Intensive Workloads
Aug 4, 2023
Videos
Liqid Composable CXL memory technology preview video
Aug 4, 2023
Videos
Compute Express Link® (CXL ®) Device Ecosystem and Usage Models [FMS 2023]
Jul 11, 2023
Presentations
Compute Express LinkTM (CXL®): An Open Industry Standard for Composable Computing [FMS 2023 Tutorial...
Jun 14, 2023
Presentations
CXL 2.0 Keynote
Jun 6, 2023
Presentations
Synopsys and Teledyne LeCroy Perform First CXL 2.0 IP Interop Demo with Compliance Tests
Feb 27, 2023
Videos
A look into the CXL device ecosystem and the evolution of CXL use cases
Jan 18, 2023
Presentations
CXL 3.0: Enabling composable systems with expanded fabric capabilities
Oct 19, 2022
Presentations
Introducing Compute Express Link® (CXL®) 3.0
Aug 2, 2022
Videos
CXL 3.0 specification
Aug 1, 2022
White Papers
CXL 1.1 vs. CXL 2.0 – What’s the difference?
Jun 15, 2022
Presentations
Exploring Compute Express Link® (CXL®) Cache Coherency
May 23, 2022
Videos
Introduction to the Compute Express Link® (CXL®) Fabric Manager
Mar 22, 2022
Presentations
An Overview of the Compute Express Link® (CXL®) 2.0 ECN
Dec 15, 2021
Presentations
Compute Express Link® (CXL®) Link-level Integrity and Data Encryption (CXL IDE)
Sep 15, 2021
Presentations
Compute Express Link® (CXL®): Supporting Persistent Memory
Jun 15, 2021
Presentations
Compute Express Link® 2.0 Specification: Memory Pooling
Mar 17, 2021
Presentations
CXL 2.0 Technical Training
Feb 16, 2021
Technical Trainings
An Overview of Reliability, Availability, and Serviceability (RAS) in Compute Express Link® 2.0
Feb 1, 2021
White Papers
Introducing the Compute Express Link® 2.0 Specification
Dec 16, 2020
Presentations
Compute Express Link® 2.0 White Paper
Nov 10, 2020
White Papers
Memory Challenges and CXL Solutions
Aug 19, 2020
Presentations
CXL 1.1 Technical Training
Jun 12, 2020
Technical Trainings
Exploring Coherent Memory and Innovative Use Cases [PowerPoint]
Mar 18, 2020
Presentations
An Introduction to Compute Express Link (CXL) Technology
Dec 12, 2019
Presentations
Compute Express Link® (CXL®): A Coherent Interface for Ultra-High-Speed Transfers
Aug 14, 2019
Presentations
Compute Express Link® Overview
Jul 15, 2019
Presentations
Introduction to Compute Express Link®
Mar 1, 2019
White Papers
Introducton to Compute Express Link® (CXL®) Technology
Feb 1, 2019
Videos
CCIX Specification Archive
CCIX Specification Archive
Gen-Z Specification Archive
Gen-Z Specification Archive
OpenCAPI Specification Archive
OpenCAPI Specification Archive
